The present invention relates to the shifting of digital data, and more particularly to a barrel shifter or multiply/divide integrated circuit (IC) structure.
In many digital circuit designs barrel shifters are used to shift digital data words, and shifting of the digital data words is also used to perform 2.sup.N multiply and divide operations. A typical barrel shifter has an array of one-bit multiplexers in a plurality of planes, one plane for each bit of the digital data word to be shifted. The digital data word is input in parallel to each plane, where 2.sup.N is the number of bits and planes and each plane has N stages. The number of multiplexers in the first stage of each plane is 2.sup.N, in the next stage 2.sup.N-1, until in the last stage it is 2.sup.0. Each plane outputs one of the bits of the digital data word, with the order being determined by the select commands to the multiplexers. This configuration requires 2.sup.N .times.2.sup.N multiplexers.
For multiply/divide operations the digital data word may be loaded in parallel to a shift register, serially shifted by the appropriate number of clock pulses in either direction, depending upon whether a multiply or divide is desired, and then read out in parallel. Alternatively the digital data word may be loaded into the shift register serially, shifted the appropriate number of clock pulses, and the result read out either serially or in parallel. Such multiplication and division is not efficient because the time that it takes to perform the operation is determined by the number of clock pulses necessary. Using a barrel shifting circuit may be used by selecting for the most or least significant bits at the output the desired bits corresponding to the desired multiplication or division and replacing the remaining bit positions with zero. However as pointed out above this requires a large number of multiplexers.
On an integrated circuit real estate is generally a scarce commodity as more and more functions are sought to be provided within a limited area. Therefore it would be advantageous to implement a fast barrel shifter or multiply/divide circuit in an efficient manner that reduces the number of multiplexers needed.